Intel 80386 Reference Programmer’s Manual Overview

标题：Intel 80386 Reference Programmer's Manual

在CSDN找到了同名文档，内容稍有不同。以下是该手册的目录：

Chapter 1 -- Introduction to the 80386

• 1.1 Organization of This Manual
• 1.2 Related Literature
• 1.3 Notational Conventions

Part I: Applications Programming

Chapter 2 -- Basic Programming Model

- 2.1 Memory Organization and Segmentation

- 2.2 Data Types

- 2.3 Registers

- 2.4 Instruction Format

- 2.5 Operand Selection

- 2.6 Interrupts and Exceptions

Chapter 3 -- Applications Instruction Set

- 3.1 Data Movement Instructions

- 3.2 Binary Arithmetic Instructions

- 3.3 Decimal Arithmetic Instructions

- 3.4 Logical Instructions

- 3.5 Control Transfer Instructions

- 3.6 String and Character Translation Instructions

- 3.7 Instructions for Block-Structured Languages

- 3.8 Flag Control Instructions

- 3.9 Coprocessor Interface Instructions

- 3.10 Segment Register Instructions

- 3.11 Miscellaneous Instructions

Part II: Systems Programming

Chapter 4 -- Systems Architecture

- 4.1 Systems Registers

- 4.2 Systems Instructions

Chapter 5 -- Memory Management

- 5.1 Segment Translation

- 5.2 Page Translation

- 5.3 Combining Segment and Page Translation

Chapter 6 -- Protection

- 6.1 Why Protection?

- 6.2 Overview of 80386 Protection Mechanisms

- 6.3 Segment-Level Protection

- 6.4 Page-Level Protection

- 6.5 Combining Page and Segment Protection

Chapter 7 -- Multitasking

- 7.1 Task State Segment

- 7.2 TSS Descriptor

- 7.3 Task Register

- 7.4 Task Gate Descriptor

- 7.5 Task Switching

- 7.6 Task Linking

- 7.7 Task Address Space

Chapter 8 -- Input/Output

- 8.1 I/O Addressing

- 8.2 I/O Instructions

- 8.3 Protection and I/O

Chapter 9 -- Exceptions and Interrupts

- 9.1 Identifying Interrupts

- 9.2 Enabling and Disabling Interrupts

- 9.3 Priority Among Simultaneous Interrupts and Exceptions

- 9.4 Interrupt Descriptor Table

- 9.5 IDT Descriptors

- 9.6 Interrupt Tasks and Interrupt Procedures

- 9.7 Error Code

- 9.8 Exception Conditions

- 9.9 Exception Summary

- 9.10 Error Code Summary

Chapter 10 -- Initialization

- 10.1 Processor State After Reset

- 10.2 Software Initialization for Real-Address Mode

- 10.3 Switching to Protected Mode

- 10.4 Software Initialization for Protected Mode

- 10.5 Initialization Example

- 10.6 TLB Testing

Chapter 11 -- Coprocessing and Multiprocessing

- 11.1 Coprocessing

- 11.2 General Multiprocessing

Chapter 12 -- Debugging

- 12.1 Debugging Features of the Architecture

- 12.2 Debug Registers

- 12.3 Debug Exceptions

Part III: Compatibility

Chapter 13 -- Executing 80286 Protected-Mode Code

- 13.1 80286 Code Executes a Subset of the 80386

- 13.2 Two ways to Execute 80286 Tasks

- 13.3 Differences From 80286

Chapter 14 -- 80386 Real-Address Mode

- 14.1 Physical Address Formation

- 14.2 Registers and Instructions

- 14.3 Interrupt and Exception Handling

- 14.4 Entering and Leaving Real-Address Mode

- 14.5 Switching Back to Real-Address Mode

- 14.6 Real-Address Mode Exceptions

- 14.7 Differences From 8086

- 14.8 Differences From 80286 Real-Address Mode

Chapter 15 -- Virtual 8086 Mode

- 15.1 Executing 8086 Code

- 15.2 Structure of a V86 Task

- 15.3 Entering and Leaving V86 Mode

- 15.4 Additional Sensitive Instructions

- 15.5 Virtual I/O

- 15.6 Differences From 8086

- 15.7 Differences From 80286 Real-Address Mode

Chapter 16 -- Mixing 16-Bit and 32 Bit Code

- 16.1 How the 80386 Implements 16-Bit and 32-Bit Features

- 16.2 Mixing 32-Bit and 16-Bit Operations

- 16.3 Sharing Data Segments Among Mixed Code Segments

- 16.4 Transferring Control Among Mixed Code Segments

Part IV: Instruction Set

Chapter 17 -- 80386 Instruction Set

- 17.1 Operand-Size and Address-Size Attributes

- 17.2 Instruction Format

Appendices

• Appendix A -- Opcode Map
• Appendix B -- Complete Flag Cross-Reference
• Appendix C -- Status Flag Summary
• Appendix D -- Condition Codes